Regviz

NXP Semiconductors /MIMXRT1021 /SPDIF /SIC

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SIC

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/MIMXRT1021/SPDIF/SIC#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LockLoss)LockLoss 0 (RxFIFOResyn)RxFIFOResyn 0 (RxFIFOUnOv)RxFIFOUnOv 0 (UQErr)UQErr 0 (UQSync)UQSync 0 (QRxOv)QRxOv 0 (URxOv)URxOv 0 (BitErr)BitErr 0 (SymErr)SymErr 0 (ValNoGood)ValNoGood 0 (CNew)CNew 0 (TxResyn)TxResyn 0 (TxUnOv)TxUnOv 0 (Lock)Lock

Description

InterruptClear Register

Fields

LockLoss

SPDIF receiver loss of lock
RxFIFOResyn

Rx FIFO resync
RxFIFOUnOv

Rx FIFO underrun/overrun
UQErr

U/Q Channel framing error
UQSync

U/Q Channel sync found
QRxOv

Q Channel receive register overrun
URxOv

U Channel receive register overrun
BitErr

SPDIF receiver found parity bit error
SymErr

SPDIF receiver found illegal symbol
ValNoGood

SPDIF validity flag no good
CNew

SPDIF receive change in value of control channel
TxResyn

SPDIF Tx FIFO resync
TxUnOv

SPDIF Tx FIFO under/overrun
Lock

SPDIF receiver’s DPLL is locked

Links

()

Register License

Copyright 2016-2020 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data